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MVME7x Series I/O Board
MVME133
MVME133-1
MVME133S-001
MVME133-2
MVME133A-20
MVME133SA-20
MVME133S-001A
MVME133XT
MVME133XTS
MVME134 MC68020 16.67MHZ CPU, 4MB, VME BOARD
MVME134FP MC68020 20MHZ CPU, 4MB, VME BOARD
MVME135 MC68020 16.67MHZ CPU, 1MB, VME BOARD
MVME135-1 MC68020 20MHZ CPU, 1MB, VME BOARD
MVME337-1 MC68020 20MHZ CPU, 1MB, VME BOARD
MVME136 MC68020 16.67MHZ CPU, 1MB, VME BOARD
MVME136A MC68020 16.67MHZ CPU, 4MB, VME BOARD
MVME141-1 MC68030 25MHZ CPU, 64KB
MVME141-2 MC68030 33.3MHZ CPU, 64KB
MVME143 MC68030 16.67MHZ CPU, 4MB, VME BOARD
MVME143-1 MC68030 20MHZ CPU, 4MB, VME BOARD
MVME143-2 MC68030 25MHZ CPU, 4MB, VME BOARD
MVME143S-2 MC68030 25MHZ CPU, 4MB, VME BOARD
MVME147 MC68030 20MHZ CPU, 4MB
MVME147-1 16.67MHz 68030, 4MB
MVME147A MC68030 25MHZ CPU, 4MB
MVME147A-1 MC68030 25MHZ CPU, 4MB
MVME147RF（1）輸入型局部變量（VAR_INPUT）
1d_0:DWORD; // 待發(fā)送數(shù)據(jù)地址指針變量
lw_4:WORD; // 待發(fā)送數(shù)據(jù)字節(jié)個(gè)數(shù)變量
（2）輸出型局部變量（VAR_OUTPUT）
lb_6:BYTE; // CRC校驗(yàn)值高位變量
lb_7:BYTE; // CRC校驗(yàn)值低位變量
（3）臨時(shí)局部變量（VAR）
lw_8:WORD; // 待發(fā)送數(shù)據(jù)字節(jié)個(gè)數(shù)計(jì)數(shù)變量
lw_10:WORD; // 待發(fā)送數(shù)據(jù)每字節(jié)8位二進(jìn)制數(shù)計(jì)數(shù)變量
Network 1
LD SM0.0
MOVW 16#FFFF, LW6 //將16位CRC校驗(yàn)寄存器LW6全置為1
Network 2
LD SM0.0
FOR LW8, +1, LW4 //對(duì)待發(fā)送數(shù)據(jù)字節(jié)個(gè)數(shù)(LW4)計(jì)數(shù)(LW8)循環(huán)
